Nghĩa của từ two-input adder bằng Tiếng Việt

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Đặt câu có từ "two-input adder"

Dưới đây là những mẫu câu có chứa từ "two-input adder", trong bộ từ điển Từ điển Anh - Việt. Chúng ta có thể tham khảo những mẫu câu này để đặt câu trong tình huống cần đặt câu với từ two-input adder, hoặc tham khảo ngữ cảnh sử dụng từ two-input adder trong bộ từ điển Từ điển Anh - Việt

1. The novel adder circuit is designed using multiplexer circuits and two input inverted logic gates making the adder very fast.

2. In the first adder, the first source is connected to the addend input of the first full adder, the second source is connected to the augend input of the first full adder, the third source is connected to the carry input of the first full adder, the sum output of the first full adder is connected to the addend input of the second full adder, the carry output of the first full adder is connected to the carry input of the next higher order stage of the second full adder, and the fourth source is connected to the augend input of the second full adder.

3. Each full adder has an addend input, an augend input, a carry input, a sum output, and a carry output.

4. A carry propagate adder circuit which differentially senses a carry input

5. Adder for adding input signals comprising first (A) and second (B) binary input numbers, with N bits each.

6. A full adder can also be constructed from two half adders by connecting A and B to the input of one half adder, then taking its sum-output S as one of the inputs to the second half adder and Cin as its other input, and finally the carry outputs from the two half-adders are connected to an OR gate.

7. A fast carry propagate adder circuit (10) which differentially senses a carry input bit C¿IN?

8. Addend and the summand input and digital and carry the output device is a half adder: 5

9. The circuit allows to accumulate samples of the input communication channels in a register using an adder.

10. The paper proposes a five - input adder module with dual carry - out, which can process more information.

11. Still further, the circuit comprises a digital adder and an analog-to-digital converter with an analog input connected to the output of the operational amplifier and a digital output connected to a first input of the digital adder.

12. The apparatus further comprising at least two electronic-circuits, operatively associated with the first adder and the second adder.

13. An adder has a first input coupled to the filtered output and a second input coupled to a loop control voltage generated by a phase lock loop.

14. Arithmetic sum of three input bits: Augends Ai, addend Bi and carry in C in from the previous adder

15. In a device for carrying out the inventive method, the output of a correlator is connected to a first input of an adder and the output of the correlator is connected to a second input of the adder by means of a time-delay element.

16. It is designed using the full Adders connected in cascade form such that the output carry of each full-adder is joined to the input carry of the subsequent full adder

17. The minuend input of the subtractor (s2), the delay element (v) and the constant adder (k2) are supplied with the highest digit (mb) of the output signal from the adder (sm), and the low pass (tp) is connected, as a PLL loop filter, via the output of the subtractor (s1) to the second input of the adder (sm).

18. The output of the first photoelectron transducer is connected to the input of the first logarithmic unit whose output is connected in parallel to the first input of the subtractor and to the second input of the adder.

19. The output of the second photoelectronic transducer is connected to the input of the second logarithmic unit whose output is connected in parallel to the second input of the subtractor and to the first input of the adder.

20. Adder circuit

21. 17.3 Two Styles of Input: Canonical or Not

22. A carry select adder to add two binary addends to produce a binary sum.

23. One subset of cells of each array also includes a respective two-bit adder, and another subset of cells of each array includes a respective three-bit adder.

24. The steering of all input lines is done simultaneously by concurrently computing for all lines the required steering in an adder network (20) and executing the steering of all lines simultaneously in a routing network (30) responsive to the adder network (20).

25. Northern death adder