Nghĩa của từ adder-subtractor bằng Tiếng Việt

@adder-subtractor
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Đặt câu có từ "adder-subtractor"

Dưới đây là những mẫu câu có chứa từ "adder-subtractor", trong bộ từ điển Từ điển Anh - Việt. Chúng ta có thể tham khảo những mẫu câu này để đặt câu trong tình huống cần đặt câu với từ adder-subtractor, hoặc tham khảo ngữ cảnh sử dụng từ adder-subtractor trong bộ từ điển Từ điển Anh - Việt

1. Said butterfly operator has an architecture comprising the hardware adder/subtractor modules (40', 42', 48', 50'), each including a plurality of basic adder/subtractor modules.

2. The discriminator determines the sign of the output signal of the adder-subtractor.

3. The entire absolute value arithmetic unit of the present invention requires essentially the same amount of area as only one conventional adder/subtractor.

4. Moreover, the pre-round logic supplies a carry bit to the full-precision adder/subtractor thus saving the time associated with a full-precision rounding bit addition.

5. Each arithmetic circuit element (36) performs an M-point butterfly operation on complex sample points and includes an adder/subtractor (44) and a serial memory (46) capable of storing M/2 sample points.

6. A mapping unit (150) is provided for controlling responsive barrel shifters (115) and for controlling one or more responsive adder/subtractor units (130) so that the resultant system has a transfer function equivalent to that of an n-bits by m-bits multiplier.

7. The apparatus and method employ: a low precision floating point adder/subtractor (34), a priority encoder (23) that determines the position of the most significant non-zero bit to generate the normalization amount and preround logic (18) which pre-shifts a rounding 13t in the opposite direction of normalization.

8. A first adder/subtractor (16) has a first input (161) zeroed, a second input (162) to receive the first difference, a control input (163) arranged to receive a top bit of the first difference and an output arranged to output a first absolute difference between the first numbers.

9. The invention relates to a method for correcting amplitude and phase offsets in a sigma-delta modulator that includes a loop comprising at least one integrator (200, 300) consisting of a filter (201, 301) and an amplifier (202, 302), an analog-to-digital converter ADC (203, 303), a digital-to-analog converter DAC (204, 304) and an adder-subtractor (205, 305).

10. The preadder stage includes: a first input port of a first multiplexer (306) coupled to the control bus; a second input port of a first logic gate (322) coupled to the control bus; a third input port of a second logic gate (321 ) coupled to the control bus; and a fourth input port of an adder/subtractor (331 ) coupled to the control bus.

11. A second adder/subtractor (35) has a first input to receive the first absolute difference, a second input to receive the second difference, a control input arranged to receive a top bit of the second difference and an output arranged to output a sum of the absolute difference of the first numbers and the absolute difference of the second numbers.